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HS-2520RH
Data Sheet August 1999 File Number
3599.2
Radiation Hardened Uncompensated, High Slew Rate Operational Amplifier
The HS-2520RH is a radiation hardened monolithic operational amplifier which delivers an unsurpassed combination of specifications for slew rate, bandwidth and settling time. This dielectrically isolated amplifier is designed for closed loop gains of 3 or greater without external compensation. In addition, this high performance component also provides low offset current and high input impedance. The 100V/s (Min) slew rate and fast settling time of this amplifier makes it an ideal component for pulse amplification and data acquisition designs. To insure compliance with slew rate and transient response specifications, all devices are 100% tested for AC performance characteristics over full temperature. This device is a valuable component for RF and video circuitry requiring wideband operation. For accurate signal conditioning designs, the HS-2520RH superior dynamic specifications are complemented by 25nA (Max) offset current and offset voltage trim capability. Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed here must be used when ordering. Detailed Electrical Specifications for these devices are contained in SMD 5962-95685. A "hot-link" is provided on our homepage for downloading. www.intersil.com/spacedefense/space.asp
Features
* Electrically Screened to SMD # 5962-95685 * QML Qualified per MIL-PRF-38535 Requirements * High Slew Rate. . . . . . . . . . . .100V/s Min, 120V/s (Typ) * Wide Power Bandwidth . . . . . . . . . . . . . . . . 1.5MHz (Min) * Wide Gain Bandwidth . . . . . . . 10MHz Min, 20MHz (Typ) * High Input Impedance . . . . . . . . 50M Min, 100M (Typ) * Low Offset Current . . . . . . . . . . . . . 25nA Min, 10nA (Typ) * Fast Settling (0.1% of 10V Step) . . . . . . . . . . 200ns (Typ) * Low Quiescent Supply Current. . . . . . . . . . . . . 6mA (Max) * Gamma Dose . . . . . . . . . . . . . . . . . . . . . . 1 x 104RAD(Si)
Applications
* Data Acquisition Systems * RF Amplifiers * Video Amplifiers * Signal Generators * Pulse Amplifiers
Ordering Information
ORDERING NUMBER HS0-2520RH-Q 5962D9568501VGA 5962D9568501VPA 5962D9568501VPC INTERNAL MKT. NUMBER HS0-2520RH-Q HS2-2520RH-Q HS7-2520RH-Q HS7B-2520RH-Q TEMP. RANGE (oC) 25 -55 to 125 -55 to 125 -55 to 125
Pinouts
HS7-2520RH (CERDIP) GDIP1-T8 OR HS7B-2520RH (SBDIP) CDIP2-T8 TOP VIEW HS2-2520RH (CAN) MACY1-X8 TOP VIEW
COMP BAL -IN +IN V1 2 3 4 + 8 7 6 5 COMP V+ OUT BAL IN+ 3 4 V5 BAL BAL 1 8 7 V+
IN-
2
+
6
OUT
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
HS-2520RH Timing Waveforms
VIN + 50 VOUT
-
1.33K 667
50pF
FIGURE 1. SIMPLIFIED TEST CIRCUIT
+1.67V INPUT INPUT
+67mV
0V
-1.67V +5V 75% OUTPUT 25% -5V T SLEW RATE = V/T V
0V OVERSHOOT +200mV 90% OUTPUT 10% 0V RISE TIME
-67mV
FIGURE 2. SLEW RATE WAVEFORM
FIGURE 3. TRANSIENT RESPONSE WAVEFORM
NOTE: Measured on both positive and negative transitions. Capacitance at Compensation pin should be minimized.
Typical Performance Curves
120 100 CURRENT (nA) 80 60 40 20 0 -20 -50 -55 -25 0 25 50
TA = 25oC, VSUPPLY = 15V, Unless Otherwise Specified
VS = 15 EQUIVALENT INPUT NOISE (V) 100 10K SOURCE RESISTANCE
BIAS CURRENT
10
0 SOURCE RESISTANCE
1.0
OFFSET CURRENT
THERMAL NOISE OF 10K RESISTOR 0.1 100Hz 1kHz 10kHz 100kHz 1MHz
75
100
125
TEMPERATURE (oC)
UPPER 3dB FREQUENCY, LOWER 3dB FREQUENCY (10Hz)
FIGURE 4. INPUT BIAS AND OFFSET CURRENT vs TEMPERATURE
FIGURE 5. EQUIVALENT INPUT NOISE vs BANDWIDTH
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HS-2520RH Typical Performance Curves
1.3 NORMALIZED PARAMETERS REFFERED TO VALUES AT 25oC OPEN LOOP VOLTAGE GAIN (dB) VS = 15 1.2 1.1 BANDWIDTH 1.0 SLEW RATE 0.9 0.8 0.7 -50 -55 -25 0 25 50 75 100 125 TEMPERATURE (oC) BANDWIDTH SLEW RATE
TA = 25oC, VSUPPLY = 15V, Unless Otherwise Specified (Continued)
120 100 80 60 40 20 0 -20 10 100 1K 10K 100K 1M 10M 100M FREQUENCY (Hz) GAIN PHASE
FIGURE 6. NORMALIZED AC PARAMETERS vs TEMPERATURE
1.1 NORMALIZED PARAMETERS REFERRED TO VALUES AT 15V
FIGURE 7. OPEN-LOOP FREQUENCY AND PHASE RESPONSE
120 OPEN LOOP VOLTAGE GAIN (dB) 100 80 60 40 20 0 1000pF -20 300pF 0pF 30pF 100pF
SLEW RATE BANDWIDTH 1.0 SLEW RATE BANDWIDTH
0.9
0.8 10
15 SUPPLY VOLTAGE
20
10
100
1K
10K
100K
1M
10
10M
FREQUENCY (Hz)
FIGURE 8. NORMALIZED AC PARAMETERS vs SUPPLY VOLTAGE AT 25oC
FIGURE 9. OPEN-LOOP FREQUENCY RESPONSE FOR VARIOUS VALUES OF CAPACITORS FROM BANDWIDTH CONTROL PIN TO GROUND
35
88 87 86 GAIN (dB) 85 84 83 82 -50 -55 -25 0 25 50 75 100 125 TEMPERATURE (oC) VS = 20 VS = 15 VS = 10 PEAK-TO-PEAK VOLTAGE SWING
VS = 20
30 25 20 15 10 5 0 10K 100K 1MEG 10MEG FREQUENCY (Hz) VS = 10 VS = 15
FIGURE 10. OPEN-LOOP VOLTAGE GAIN vs TEMPERATURE
FIGURE 11. OUTPUT VOLTAGE SWING vs FREQUENCY AT 25oC
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HS-2520RH Typical Performance Curves
4.8 4.6 4.4 4.2 4.0 3.8 3.6 -50 -55 -25 0 25 50 TEMPERATURE (oC) 75 100 125 HORIZONTAL = 100ns/DIV TA = 25oC VS = +15V
TA = 25oC, VSUPPLY = 15V, Unless Otherwise Specified (Continued)
RL = 2k CL = 50pF
CURRENT (nA)
VS = 20 VS = 15 VS = 10
UPPER TRACE: INPUT; 1.67V/DIV 10 LOWER TRACE: OUTPUT; 5V/DIV
FIGURE 12. POWER SUPPLY CURRENT vs TEMPERATURE
120 100 POWER SUPPLY REJECTION RATIO (dB) 80 60 40 20 0 100kHz
FIGURE 13. VOLTAGE FOLLOWER PULSE RESPONSE
1000 INPUT NOISE VOLTAGE (nVHz) 10 INPUT NOISE CURRENT (pAHz)
INPUT NOISE CURRENT 100 10
NEGATIVE SUPPLY POSITIVE SUPPLY
INPUT NOISE VOLTAGE 10 1
1 1kHz 10kHz 100kHz 1MHz 1 10 100 1K 10K 100K FREQUENCY (Hz) FREQUENCY (Hz)
0.1
FIGURE 14. POWER SUPPLY REJECTION RATIO vs FREQUENCY
FIGURE 15. INPUT NOISE DENSITY vs FREQUENCY
Suggested VOS Adjustment
V+
20k RT
IN
BAL
OUT
V-
NOTE: Tested offset adjustment range is | VOS +1mV | minimum referred to output. Typical range is +20mV to -18mV with RT = 20k.
4
HS-2520RH Burn-In Circuits
HS7-2520 CERDIP HS2-2520 METAL CAN
V+ C3 8 1 2 R1 3 VD2 4 C2 R1 C2 VD2 8 1 V+ C1 C3 3 4 D1 2 + 5 7 C1 D1
+
7 6 5
-
6
NOTES: 1. R1 = 1M, 5%, 1/4W (Min) 2. C1 = C2 = 0.01F/Socket (Min) or 0.1F/Row (Min) 3. C3 = 0.01F (10%)/Socket 4. D1 = D2 = 1N4002 or equivalent (per board) 5. |(V+) - (V-)| = 31V
NOTES: 6. R1 = 1M, 5%, 1/4W (Min) 7. C1 = C2 = 0.01F/Socket (Min) or 0.1F/Row (Min) 8. C3 = 0.01F (10%)/Socket 9. D1 = D2 = 1N4002 or equivalent (per board) 10. |(V+) - (V-)| = 31V
Irradiation Circuits
IRRADIATION CIRCUIT
C 1 BAL 1M -5% (1/4W MIN) VV2 C 2 -IN 3 +IN 4 COMP 8 V+ 7 OUT 6 BAL 5 C V1
NOTES: 11. V1 = +15V 10% 12. V2 = -15V 10% 13. C = 0.1F 10%
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HS-2520RH Schematic Diagram
OFFSET OFFSET V+ Q30 R21 200 R2A 200 R2B 200 R20 200 R12 2K Q15 Q3A Q16 R16 960 Q27 BW CONTROL R15 11.13K Q1A +INPUT Q17 Q2A Q21A Q31 Q25 Q26 Q18 Q19 Q20 V-INPUT R3A 1.48K R3B 1.48K R19 1.48K R10 740 R6A 3K R1A 1.68K R1B 1.68K Q24 Q21B Q22 R6B 3K Q5A Q6 Q9 Q5B Q10 Q14 Q1B Q7 Q2B Q4A Q4B Q8 Q3B C1 1pF Q23 Q13B Q11B Q12B Q13A Q11A R18 30 R9 1.1K Q12A R17 30 OUTPUT
R2A 1.8K Q29 Q28 R13 2K R11 4K
R2B 1.8K
6
HS-2520RH Die Characteristics
DIE DIMENSIONS: 65 mils x 50 mils x 19 mils (1660m x 1270m x 483m) INTERFACE MATERIALS: Glassivation: Type: Nitride Thickness: 7kA 0.7kA Top Metallization: Type: Aluminum Thickness: 16kA 2kA Substrate: Linear Bipolar, DI Backside Finish: Silicon ASSEMBLY RELATED INFORMATION: Substrate Potential (Powered Up): Unbiased ADDITIONAL INFORMATION: Worst Case Current Density: <2 x 105 A/cm2 Transistor Count: 40
Metallization Mask Layout
HS-2520RH
V+ OUT BAL
V-
COMP
BAL
-IN
+IN
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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